[parisc-linux] sched-O1-2.4.17-I3.patch, need help
joel.soete@freebel.net
joel.soete@freebel.net
Mon, 21 Jan 2002 08:14:11 +0100 (CET)
Hello James,
Thanks a lot for inforamtion.
Quoting James Bottomley <James.Bottomley@HansenPartnership.com>:
> > > while (1) {
> > > void (*idle)(void) = pm_idle;
> > > if (!idle)
> > > idle = default_idle;
> > > - while (!current->need_resched)
> > > + if (!current->need_resched)
> > > idle();
> > > schedule();
> > > check_pgt_cache();
> >
> > Dunno.
>
> This is sending the idle thread back through the scheduler at least once
> every
> clock tick. On the x86, idle() halts the processor until it receives an
>
> interrupt.
>
> I *think* the reason is the idle tick rebalances the run queue but
> doesn't
> schedule the first task for execution (if there is one), so the call to
>
> schedule() does that.
>
> However, there are more changes than just this (I just did the changes
> for a
> different arch). You need to change p->processor to p->cpu in the SMP
> code.
> There may be other struct task changes that bite, but that looks like
> the only
> one in parisc.
I think that also p->nice would be changed in p->__nice?
>
> You also get bitten (in I3) by the physical to logical CPU mapping
> problems.
> These are gone in J0, but now you have to introduce and extra
> migrate_process
> cross processor interrupt.
I also have a look in J2 and notice that task_struct was deepely changed and so
I ignore what will I have to do with offset.c.
>
> Probably the best way to work on this is to start a 2.5 parisc tree...
>
I do also believe that the limits of my knowledge will yet oblige me to wait
this release.
Thanks anyway for help and precious advises,
Joel
> Good luck.
>
> James Bottomley
>
>
>
>
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