[parisc-linux] glibc 2.3.1 - It's alive! - patches

[John David Anglin]

> __asm__ __volatile__ ("fmpy,dbl %1,%%fr0,%0\n\t"
> 			/* FIXME: is this a proper trap barrier? */
> 			"fcpy,dbl %%fr0,%%fr0" : "=f" (d) : "0"(d));

Looking at feraiseexcept, I see that you only want to raise one
exception at a time out of a specified set.  Reading the status register
will raise all outstanding exceptions.  I think what needs to be
done is something like the following:

__asm__ __volatile__ ("fmpy,dbl %1,%%fr0,%0\n\t"
 		      "fcmp,dbl,!= %%fr0,%0\n\t"
 		      "ftest\n\t"
 		      "nop" : "=f" (d) : "0"(d));

Doing a compare and test of the result of the fmpy insn will ensure
that any exceptions related to that operation are raised prior to
the ftest insn being queued in floating-point coprocessor.

There is some information in pa.md on the floating-point units used with
different processors.  For example, the 7100LC has three floating-point
units: ALU, MUL, and DIV.  The situation in the PA8000 is much more
complicated because of its large reorder buffer (56 entries).

When an exception occurs, it sets the T bit and the coprocessor is
armed to trap if the exception enable for the trap is 1.  The trap
is taken at the next floating point insn.  However, because of the
out of order execution of instructions and multiple floating-point
units, care has to be taken in selecting the following insn.  It
has to have a dependency on the trap generating insn to ensure that
it actually follows.  Possibly, the ftest is unnecessary but it
ensures that any traps related to the previous two insns are taken.

Dave
-- 
J. David Anglin                                  dave.anglin@nrc.ca
National Research Council of Canada              (613) 990-0752 (FAX: 952-6605)