[parisc-linux] 2.4.18 SMP instability

Grant Grundler grundler@dsl2.external.hp.com
Sun, 02 Jun 2002 10:32:01 -0600

Jeremy Drake wrote:
> So, at least we can rule out any damage to the box as the cause of this. 

Yup - thanks for trying that.

Offhand, Here are the differences I'm aware of between J5k and c3k:
o 2-CPU vs 1
o cache is 4-way associative vs 1-way (Same PA8500 CPU though!)
o J5K requires newer rev CPU (some SMP-related bugs fixed)
o Same PDC, but probably initializes a few things differently
o Though IO subsystem is identical chip set, J5k has more PCI busses
  and more slots.

Since dirty cache writeback can be sensitive to how busy the system is,
it's possible the HPMC is caused by a similar problem to what we saw
on PA8700 systems. You might try building a kernel with
"ioc_needs_fdc" forced true in arch/parisc/kernel/sba_iommu.c.
If it avoids the HPMC (but we still see other hangs), then it's
a clue we don't have caching working right for that CPU setup.