[parisc-linux] Lasi/Dino/Interrupts (fwd)

[Alan Cox]

> The PCI firmware is rather extensive.  It walks the bus, can deal with
> PCI to PCI bridges, and assigns both address space and interrupt
> lines to every device it finds.  It leaves the imporartant information
> in the base address register and interrupt line register of the PCI devices
> it finds.

Ok. That makes life very easy for us indeed.

> The parallel port registers are definitely not in flash space, especailly
> on any system with a PA7300LC since the flash space is from Clark not
> LASI, and the parallel port is completely inside LASI.
> 
> My reading of the ERS says that the slave reset is at LASI_BASE+0x10_2000
> and parallel DMA reset is at LASI_BASE+0x10_3000.  A 4k page is assigned
> for each set of registers.  Where does it say 10300?  I'll fix the ERS.

The bottom of 12.2.2 under table 14

"The parallel port dma registers will be .."

Alan