[parisc-linux] Re:[parisc-linux-cvs] linux-2.6 kyle

Joel Soete soete.joel at scarlet.be
Thu Aug 17 02:02:51 MDT 2006


> > Let me know if you need more info.
> >
> > TIA,
> >     Joel
> 
> http://www.parisc-linux.org/faq/kernelbug-howto.html
> Please don't include any analysis since that will complicate the
> issue.
Please help me to cleanup/improve this script, so.

> Please do follow the steps in the FAQ.
> 

One more question (according to assembly stuff)
what happen when the two cpu excute at the same time the same:

 ldcw,co 0(%r3),%r28 

here it seems that r3 are all == r26 == 000000001049ee80 

(the idea is that: if the two cpu execute the same insn of the same loop at
the same time they would also excecute at the same time the (2) previous insn) 

(unfortunately I don't understand all the details of the ldcw description in
parisc-2.0.pdf ;-( )

Sorry, a second question always about 
static __inline__ __attribute__((always_inline)) void
__raw_read_lock(raw_rwlock_t *rw)
{
 __raw_spin_lock_flags(&rw->lock, 0);

 rw->counter++;

 __raw_spin_unlock(&rw->lock);
}

(and sisters)
didn't we have to apply programming note page G4 (G-4 Memory Ordering Model
PA-RISC 2.0 Architecture) with s ==  &rw->lock and x == rw->counter?

Thanks for your patience,
    Joel

> Cheers,
> Carlos.
> _______________________________________________
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> parisc-linux at lists.parisc-linux.org
> http://lists.parisc-linux.org/mailman/listinfo/parisc-linux
> 
> 

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