[parisc-linux] Re: RFC: mmap patch

[Grant Grundler]

On Fri, Mar 07, 2003 at 10:29:45PM -0800, David S. Miller wrote:
> If you flush caches exactly what sparc64 does in 2.5.x, and you do
> have a virtually indexed, physically tagged cache, you should have no
> correctness.

After getting some sleep and thinking about how IOMMUs work on parisc,
I've convinced myself the CPU caches are virtually tagged and
virtually indexed. Part of the IOMMU function is to provide the
virtual address tag/index bits in order to acquire cacheline ownership
on behalf of the device doing DMA. I don't know exactly how that
matters to the VM design, but it seems relevant that parisc is not
physically indexed.

thanks,
grant