[parisc-linux] Re: [parisc-linux-cvs] linux grundler

[John Marvin]

> 2.4.20-pa24 PA20 memory ordering
> Kudos to John David Anglin and Carlos O'Donnell for realizing
> PA 2.0 is not strongly ordered like PA1.x is.
> Read appendix G or PA-RISC 2.0 Architecture (Gerry Kane) for
> details on "Memory Ordering Model".

Sorry, this is wrong.  I'm afraid you are wasting your time with all of
these code changes.

The problem is that the Kane book defines the architecture, i.e. it
defines what can be done, not what has been done.  Of course, to know what
has been done you have to read the various processor ERS's, and I'm not
sure we've made any of the PA2.0 chip ERS's available.

Anyway, no PA2.0 processor has implemented the PSW O bit, TLB O bit or
support for the ,o completers (they are just ignored).  All of the PA2.0
processors are strongly ordered, just like the PA1.x processors are.  I
can pretty much guarantee that no future PA processor is going to change
that fact.

John Marvin
jsm@fc.hp.com