[parisc-linux] Re: [parisc-linux-cvs] linux grundler

John David Anglin dave@hiauly1.hia.nrc.ca
Sat, 8 Feb 2003 21:11:32 -0500 (EST)


> > lock(l1)
> > do something
> > unlock(l1)
> > 
> > lock(l2)
> > do something else
> > unlock(l2)
> > 
> > will gcc ever move the lock(l2) before the unlock(l1)? 
> 
> well, bad example, since l1 and l2 are both volatile, but in general,
> nothing will prevent part of "do something else" to happen inside the l1
> lock, right?

Volatile would stop gcc from moving code across either the lock or the unlock.
A blockage is in fact implemented as an UNSPEC_VOLATILE instruction.
The PA 8000 has a large reorder buffer, so there are similar issues.
It's guaranteed that instructions will appear to execute in order on a
processor but the memory updates as viewed from another processor may
occur out of order.  To ensure that other processors have a consistent
view of whats happening, one must use ordered instructions for the lock
and unlock operations.  This will force all stores and loads inside the
lock to complete.  Further, if cache flush operations occur inside
a lock, you must also do a "sync" before unlocking to ensure that these
operations complete.  The ldcw insn is strongly ordered.  A load and
store on PA 2.0 can be made ordered with the correct completer.  Cache
flush operations are weakly ordered.  On PA 1.x, all load and store
instructions are strongly ordered, so ordering isn't an issue.

The current spinlock reset is done in high-level C.  So, gcc can move code
that that isn't dependent across the reset.  PA 2.0 processors can also do
the same.

Appendix G describes ordering in much more detail.  Hopefully, I haven't
butchered what's said there too badly.

The reordering that GCC does is conditional on instruction dependencies.  I
just reworked the handling of the PIC register restore in PIC code
because all the PIC register were not apparent in the initial scheduling
pass.  This is in 3.3 and main, but not 3.2.

Dave
-- 
J. David Anglin                                  dave.anglin@nrc-cnrc.gc.ca
National Research Council of Canada              (613) 990-0752 (FAX: 952-6605)