[parisc-linux] One more step: Interruption (trap) 18 on 9000/720
Christoph Plattner
christoph.plattner@alcatel.at
Wed, 24 Jan 2001 09:14:50 +0100
Hallo PA RISC hackers !
I mentioned before, that I have problems using my Apollo 700 (9000/720)
with the Linux here. I build a new cross tool chain and a new
kernel + palo (all from 13.Jan 2001) but I always have the problem
of that always repeated error:
handler_interruption() pid=1 command='init'
or whatever my first process is. I have instrumented the kernel code
and added the output of the code number (a good idea to have this
fix in the kernel !) and I saw:
code=18
So I have the code 18 (decimal). In the PA RISC 1.1 manual (your link)
I saw following description:
18 Data memory protection trap / Unaligned data reference trap
So what does this mean here. An alignment problem ?
Why is this code not handled in the switch/case ?
I always use (I think the 32bit code). Have I set to a parisc64 ?
How can I influence this ?
Which kind of CPU is this in the 720 model ? (I know a 50MHz PA RISC ..)
I hope anybody can help here
Christoph
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