[parisc-linux] Set Associative cache flushing bug

[John Marvin]

I just checked in a fix for a bug we had when flushing the entire cache
on processors with set associative caches (PCXL2, PCXW, PCXW+). The
bug probably rarely occured on PCXL2, but happens fairly often on most
PCXW(+) machines. With this checkin we've been able to natively build
a kernel multiple times on a C3K and A500 (both with the 64 bit kernel).

So, top of branch is once again in fairly stable condition, and possibly
better than ever for PCXW/PCXW+ based machines.

John