Question on Linux DMA routines

[Grant Grundler]

Grant Grundler wrote:
...
> The HW *is* fully coherent when the CPU doesn't cache the pages.
> Only systems with PCX-L/L2 CPU (need to) operate this way.
> All other platforms have an I/O MMU which manages the coherency.

Correction - PCX-T and older platforms are not coherent and U-bit
isn't available/useable on those machines. Drivers must do their own
cache flushing. sim700 (LASI SCSI) does this and I think Apricot
(LASI LAN) too. I'm suspecting this might be part of the 735 problems.

grant

Grant Grundler
Unix Systems Enablement Lab
+1.408.447.7253