[parisc-linux] 2.4.0-test6 lack of speed

[David Huggins-Daines]

Richard Hirst <rhirst@linuxcare.com> writes:

> We just blindly assume addresses passed to flush_page_range() are
> kernel virtual addresses, but in this case I guess they are user
> process virtual addresses.

Right.  I noticed that the FIC/FICE/FDC/FDCE instructions have a space
register field.  I wonder if we should be explicitly specifying %sr3,
since that's what we use (ahem, what we *WOULD* use if <asm/uaccess.h>
were actually implemented) to access user space.

Are PA-RISC caches indexed with the space ID as well as the offset?
Do we need to flush kernel virtual addresses at all?

> exit_mmap: calling flush_cache_range(0x00001000, 0x00083000)

text

> exit_mmap: calling flush_cache_range(0x00083000, 0x00085000)

data and bss

> exit_mmap: calling flush_cache_range(0x00085000, 0x00088000)

heap

> exit_mmap: calling flush_cache_range(0x2001f000, 0x30000000)

stack

>  Even so, the last one below looks like a rather large area to have
> mmapped.

Yes, it's arbitrarily huge, and this is a VM problem that needs to be
fixed.  It should grow upwards as needed via the page fault handler.
Paging John Marvin... (pun intended ;-)

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