[parisc-linux-cvs] linux-2.6 jejb
James Bottomley
James.Bottomley at steeleye.com
Sat May 8 08:16:30 MDT 2004
On Sat, 2004-05-08 at 09:12, James Bottomley wrote:
> CVSROOT: /var/cvs
> Module name: linux-2.6
> Changes by: jejb 04/05/08 08:12:46
>
> Modified files:
> . : Makefile
> arch/parisc/kernel: asm-offsets.c head.S head64.S
> include/asm-parisc: pgtable.h
>
> Log message:
> Fix 32 bit HPMC with large kernels
>
> Basically there was a hard coded assumption that PT_INITIAL == 2 inside
> head.S. This patch removes all such assumptions.
>
> There still seems to be a sba_iommu issue on 32 bit platforms.
Index: arch/parisc/kernel/asm-offsets.c
===================================================================
RCS file: /var/cvs/linux-2.6/arch/parisc/kernel/asm-offsets.c,v
retrieving revision 1.8
diff -u -r1.8 asm-offsets.c
--- a/arch/parisc/kernel/asm-offsets.c 2 May 2004 16:16:01 -0000 1.8
+++ b/arch/parisc/kernel/asm-offsets.c 8 May 2004 14:10:11 -0000
@@ -288,6 +288,8 @@
DEFINE(ASM_PGD_ENTRY_SIZE, PGD_ENTRY_SIZE);
DEFINE(ASM_PMD_ENTRY_SIZE, PMD_ENTRY_SIZE);
DEFINE(ASM_PTE_ENTRY_SIZE, PTE_ENTRY_SIZE);
+ DEFINE(ASM_PT_INITIAL, PT_INITIAL);
+ DEFINE(ASM_PAGE_SIZE, PAGE_SIZE);
BLANK();
return 0;
}
Index: arch/parisc/kernel/head.S
===================================================================
RCS file: /var/cvs/linux-2.6/arch/parisc/kernel/head.S,v
retrieving revision 1.5
diff -u -r1.5 head.S
--- a/arch/parisc/kernel/head.S 1 May 2004 16:05:55 -0000 1.5
+++ b/arch/parisc/kernel/head.S 8 May 2004 14:10:11 -0000
@@ -82,15 +82,21 @@
ldo R%PA(swapper_pg_dir)(%r4),%r4
mtctl %r4,%cr24 /* Initialize kernel root pointer */
mtctl %r4,%cr25 /* Initialize user root pointer */
+ ldi ASM_PT_INITIAL,%r1
+ ldo ASM_PGD_ENTRY*ASM_PGD_ENTRY_SIZE(%r4),%r4
+1:
+ stw %r3,0(%r4)
+ ldo ASM_PAGE_SIZE(%r3),%r3
+ addib,> -1,%r1,1b
+ ldo ASM_PGD_ENTRY_SIZE(%r4),%r4
- stw %r3,ASM_PGD_ENTRY*ASM_PGD_ENTRY_SIZE(%r4)
- ldo 0x1000(%r3),%r3
- stw %r3,(ASM_PGD_ENTRY + 1)*ASM_PGD_ENTRY_SIZE(%r4)
ldo _PAGE_KERNEL(%r0),%r3 /* Hardwired 0 phys addr start */
+ ldil L%PA(pg0),%r1
+ ldo R%PA(pg0)(%r1),%r1
$pgt_fill_loop:
stwm %r3,ASM_PTE_ENTRY_SIZE(%r1)
- ldo 0x1000(%r3),%r3
- bb,>= %r3,8,$pgt_fill_loop
+ ldo ASM_PAGE_SIZE(%r3),%r3
+ bb,>= %r3,31-KERNEL_INITIAL_ORDER,$pgt_fill_loop
nop
Index: arch/parisc/kernel/head64.S
===================================================================
RCS file: /var/cvs/linux-2.6/arch/parisc/kernel/head64.S,v
retrieving revision 1.8
diff -u -r1.8 head64.S
--- a/arch/parisc/kernel/head64.S 4 May 2004 01:30:19 -0000 1.8
+++ b/arch/parisc/kernel/head64.S 8 May 2004 14:10:11 -0000
@@ -91,19 +91,22 @@
stw %r3,ASM_PGD_ENTRY*ASM_PGD_ENTRY_SIZE(%r4)
ldo _PAGE_TABLE(%r1),%r3
- stw %r3,(ASM_PMD_ENTRY * ASM_PMD_ENTRY_SIZE) (%r5)
- ldo 0x1000(%r3),%r3
- stw %r3,((ASM_PMD_ENTRY + 1)*ASM_PMD_ENTRY_SIZE)(%r5)
- ldo 0x1000(%r3),%r3
- stw %r3,((ASM_PMD_ENTRY + 2)*ASM_PMD_ENTRY_SIZE)(%r5)
- ldo 0x1000(%r3),%r3
- stw %r3,((ASM_PMD_ENTRY + 3)*ASM_PMD_ENTRY_SIZE)(%r5)
+ ldo ASM_PMD_ENTRY*ASM_PMD_ENTRY_SIZE(%r5),%r5
+ ldi ASM_PT_INITIAL,%r1
+1:
+ stw %r3,0(%r5)
+ ldo ASM_PAGE_SIZE(%r3),%r3
+ addib,> -1,%r1,1b
+ ldo ASM_PMD_ENTRY_SIZE(%r5),%r5
ldo _PAGE_KERNEL(%r0),%r3 /* Hardwired 0 phys addr start */
+ ldil L%PA(pg0),%r1
+ ldo R%PA(pg0)(%r1),%r1
+
$pgt_fill_loop:
std,ma %r3,ASM_PTE_ENTRY_SIZE(%r1)
- ldo 0x1000(%r3),%r3
- bb,>= %r3,8,$pgt_fill_loop
+ ldo ASM_PAGE_SIZE(%r3),%r3
+ bb,>= %r3,31-KERNEL_INITIAL_ORDER,$pgt_fill_loop
nop
/* And the RFI Target address too */
Index: include/asm-parisc/pgtable.h
===================================================================
RCS file: /var/cvs/linux-2.6/include/asm-parisc/pgtable.h,v
retrieving revision 1.10
diff -u -r1.10 pgtable.h
--- a/include/asm-parisc/pgtable.h 5 May 2004 20:48:11 -0000 1.10
+++ b/include/asm-parisc/pgtable.h 8 May 2004 14:10:30 -0000
@@ -55,22 +55,18 @@
#define ISTACK_SIZE 32768 /* Interrupt Stack Size */
#define ISTACK_ORDER 3
-/*
- * NOTE: Many of the below macros use PT_NLEVELS because
- * it is convenient that PT_NLEVELS == LOG2(pte size in bytes),
- * i.e. we use 3 level page tables when we use 8 byte pte's
- * (for 64 bit) and 2 level page tables when we use 4 byte pte's
- */
+/* This is the size of the initially mapped kernel memory (i.e. currently
+ * 0 to 1<<23 == 8MB */
+#define KERNEL_INITIAL_ORDER 23
+#define KERNEL_INITIAL_SIZE (1 << KERNEL_INITIAL_ORDER)
#ifdef __LP64__
#define PT_NLEVELS 3
-#define PT_INITIAL 4 /* Number of initial page tables */
#define PGD_ORDER 1 /* Number of pages per pgd */
#define PMD_ORDER 1 /* Number of pages per pmd */
#define PGD_ALLOC_ORDER 2 /* first pgd contains pmd */
#else
#define PT_NLEVELS 2
-#define PT_INITIAL 4 /* Number of initial page tables */
#define PGD_ORDER 1 /* Number of pages per pgd */
#define PGD_ALLOC_ORDER PGD_ORDER
#endif
@@ -108,6 +104,10 @@
#define MAX_ADDRESS (1UL << MAX_ADDRBITS)
#define SPACEID_SHIFT (MAX_ADDRBITS - 32)
+
+/* This calculates the number of initial pages we need for the initial
+ * page tables */
+#define PT_INITIAL (1 << (KERNEL_INITIAL_ORDER - PMD_SHIFT))
/*
* pgd entries used up by user/kernel:
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