[parisc-linux-cvs] linux-2.6 tausq
Randolph Chung
randolph at tausq.org
Mon Jul 12 23:40:33 MDT 2004
> . : Makefile
> include/asm-parisc: bitops.h pgtable.h thread_info.h
>
> Log message:
> 2.6.7-pa14
> - Change thread_info.flags to an unsigned long
> - Change bitop prototypes to take unsigned long * instead of void *
> - Update pgtable.h and ext2 callers to fix compile warnings
While doing more SMP testing, I noticed that we were corrupting the
thread_info.cpu field because flags was only 32-bit and our set_bit
cannot work on < sizeof(unsigned long) entities. This patch changes the
flags field to unsigned long (at the same time i shuffled the order of
the other fields a bit for better packing and possibly better cache-line
usage). Also as jejb suggested, I've changed the prototype of the bitops
functions so that we'll get a warning if there are other cases in the
kernel where we pass u32 values into the bitops.
This fixes the kmem_cache_alloc() case i posted earlier, but smp still
doesn't work.
randolph
Index: include/asm-parisc/bitops.h
===================================================================
RCS file: /var/cvs/linux-2.6/include/asm-parisc/bitops.h,v
retrieving revision 1.11
diff -u -p -r1.11 bitops.h
--- include/asm-parisc/bitops.h 26 Jun 2004 19:40:40 -0000 1.11
+++ include/asm-parisc/bitops.h 13 Jul 2004 05:32:46 -0000
@@ -30,7 +30,7 @@
#define smp_mb__before_clear_bit() smp_mb()
#define smp_mb__after_clear_bit() smp_mb()
-static __inline__ void set_bit(int nr, volatile void * address)
+static __inline__ void set_bit(int nr, volatile unsigned long * address)
{
unsigned long mask;
unsigned long *addr = (unsigned long *) address;
@@ -43,7 +43,7 @@ static __inline__ void set_bit(int nr, v
atomic_spin_unlock_irqrestore(ATOMIC_HASH(addr), flags);
}
-static __inline__ void __set_bit(int nr, volatile void * address)
+static __inline__ void __set_bit(int nr, volatile unsigned long * address)
{
unsigned long mask;
unsigned long *addr = (unsigned long *) address;
@@ -53,7 +53,7 @@ static __inline__ void __set_bit(int nr,
*addr |= mask;
}
-static __inline__ void clear_bit(int nr, volatile void * address)
+static __inline__ void clear_bit(int nr, volatile unsigned long * address)
{
unsigned long mask;
unsigned long *addr = (unsigned long *) address;
@@ -66,7 +66,7 @@ static __inline__ void clear_bit(int nr,
atomic_spin_unlock_irqrestore(ATOMIC_HASH(addr), flags);
}
-static __inline__ void __clear_bit(unsigned long nr, volatile void * address)
+static __inline__ void __clear_bit(unsigned long nr, volatile unsigned long * address)
{
unsigned long mask;
unsigned long *addr = (unsigned long *) address;
@@ -76,7 +76,7 @@ static __inline__ void __clear_bit(unsig
*addr &= ~mask;
}
-static __inline__ void change_bit(int nr, volatile void * address)
+static __inline__ void change_bit(int nr, volatile unsigned long * address)
{
unsigned long mask;
unsigned long *addr = (unsigned long *) address;
@@ -89,7 +89,7 @@ static __inline__ void change_bit(int nr
atomic_spin_unlock_irqrestore(ATOMIC_HASH(addr), flags);
}
-static __inline__ void __change_bit(int nr, volatile void * address)
+static __inline__ void __change_bit(int nr, volatile unsigned long * address)
{
unsigned long mask;
unsigned long *addr = (unsigned long *) address;
@@ -99,7 +99,7 @@ static __inline__ void __change_bit(int
*addr ^= mask;
}
-static __inline__ int test_and_set_bit(int nr, volatile void * address)
+static __inline__ int test_and_set_bit(int nr, volatile unsigned long * address)
{
unsigned long mask;
unsigned long *addr = (unsigned long *) address;
@@ -116,7 +116,7 @@ static __inline__ int test_and_set_bit(i
return oldbit;
}
-static __inline__ int __test_and_set_bit(int nr, volatile void * address)
+static __inline__ int __test_and_set_bit(int nr, volatile unsigned long * address)
{
unsigned long mask;
unsigned long *addr = (unsigned long *) address;
@@ -130,7 +130,7 @@ static __inline__ int __test_and_set_bit
return oldbit;
}
-static __inline__ int test_and_clear_bit(int nr, volatile void * address)
+static __inline__ int test_and_clear_bit(int nr, volatile unsigned long * address)
{
unsigned long mask;
unsigned long *addr = (unsigned long *) address;
@@ -147,7 +147,7 @@ static __inline__ int test_and_clear_bit
return oldbit;
}
-static __inline__ int __test_and_clear_bit(int nr, volatile void * address)
+static __inline__ int __test_and_clear_bit(int nr, volatile unsigned long * address)
{
unsigned long mask;
unsigned long *addr = (unsigned long *) address;
@@ -161,7 +161,7 @@ static __inline__ int __test_and_clear_b
return oldbit;
}
-static __inline__ int test_and_change_bit(int nr, volatile void * address)
+static __inline__ int test_and_change_bit(int nr, volatile unsigned long * address)
{
unsigned long mask;
unsigned long *addr = (unsigned long *) address;
@@ -178,7 +178,7 @@ static __inline__ int test_and_change_bi
return oldbit;
}
-static __inline__ int __test_and_change_bit(int nr, volatile void * address)
+static __inline__ int __test_and_change_bit(int nr, volatile unsigned long * address)
{
unsigned long mask;
unsigned long *addr = (unsigned long *) address;
@@ -192,7 +192,7 @@ static __inline__ int __test_and_change_
return oldbit;
}
-static __inline__ int test_bit(int nr, const volatile void *address)
+static __inline__ int test_bit(int nr, const volatile unsigned long *address)
{
unsigned long mask;
const unsigned long *addr = (const unsigned long *)address;
@@ -446,15 +446,15 @@ found_middle:
* disabling interrupts.
*/
#ifdef __LP64__
-#define ext2_set_bit(nr, addr) test_and_set_bit((nr) ^ 0x38, addr)
-#define ext2_set_bit_atomic(l,nr,addr) test_and_set_bit((nr) ^ 0x38, addr)
-#define ext2_clear_bit(nr, addr) test_and_clear_bit((nr) ^ 0x38, addr)
-#define ext2_clear_bit_atomic(l,nr,addr) test_and_clear_bit((nr) ^ 0x38, addr)
+#define ext2_set_bit(nr, addr) test_and_set_bit((nr) ^ 0x38, (unsigned long *)addr)
+#define ext2_set_bit_atomic(l,nr,addr) test_and_set_bit((nr) ^ 0x38, (unsigned long *)addr)
+#define ext2_clear_bit(nr, addr) test_and_clear_bit((nr) ^ 0x38, (unsigned long *)addr)
+#define ext2_clear_bit_atomic(l,nr,addr) test_and_clear_bit((nr) ^ 0x38, (unsigned long *)addr)
#else
-#define ext2_set_bit(nr, addr) test_and_set_bit((nr) ^ 0x18, addr)
-#define ext2_set_bit_atomic(l,nr,addr) test_and_set_bit((nr) ^ 0x18, addr)
-#define ext2_clear_bit(nr, addr) test_and_clear_bit((nr) ^ 0x18, addr)
-#define ext2_clear_bit_atomic(l,nr,addr) test_and_clear_bit((nr) ^ 0x18, addr)
+#define ext2_set_bit(nr, addr) test_and_set_bit((nr) ^ 0x18, (unsigned long *)addr)
+#define ext2_set_bit_atomic(l,nr,addr) test_and_set_bit((nr) ^ 0x18, (unsigned long *)addr)
+#define ext2_clear_bit(nr, addr) test_and_clear_bit((nr) ^ 0x18, (unsigned long *)addr)
+#define ext2_clear_bit_atomic(l,nr,addr) test_and_clear_bit((nr) ^ 0x18, (unsigned long *)addr)
#endif
#endif /* __KERNEL__ */
Index: include/asm-parisc/pgtable.h
===================================================================
RCS file: /var/cvs/linux-2.6/include/asm-parisc/pgtable.h,v
retrieving revision 1.16
diff -u -p -r1.16 pgtable.h
--- include/asm-parisc/pgtable.h 11 Jul 2004 17:31:33 -0000 1.16
+++ include/asm-parisc/pgtable.h 13 Jul 2004 05:32:46 -0000
@@ -432,7 +432,7 @@ extern void update_mmu_cache(struct vm_a
static inline int ptep_test_and_clear_young(pte_t *ptep)
{
#ifdef CONFIG_SMP
- return test_and_clear_bit(xlate_pabit(_PAGE_ACCESSED_BIT), ptep);
+ return test_and_clear_bit(xlate_pabit(_PAGE_ACCESSED_BIT), &pte_val(*ptep));
#else
pte_t pte = *ptep;
if (!pte_young(pte))
@@ -445,7 +445,7 @@ static inline int ptep_test_and_clear_yo
static inline int ptep_test_and_clear_dirty(pte_t *ptep)
{
#ifdef CONFIG_SMP
- return test_and_clear_bit(xlate_pabit(_PAGE_DIRTY_BIT), ptep);
+ return test_and_clear_bit(xlate_pabit(_PAGE_DIRTY_BIT), &pte_val(*ptep));
#else
pte_t pte = *ptep;
if (!pte_dirty(pte))
@@ -490,7 +490,7 @@ static inline void ptep_set_wrprotect(pt
static inline void ptep_mkdirty(pte_t *ptep)
{
#ifdef CONFIG_SMP
- set_bit(xlate_pabit(_PAGE_DIRTY_BIT), ptep);
+ set_bit(xlate_pabit(_PAGE_DIRTY_BIT), &pte_val(*ptep));
#else
pte_t old_pte = *ptep;
set_pte(ptep, pte_mkdirty(old_pte));
Index: include/asm-parisc/thread_info.h
===================================================================
RCS file: /var/cvs/linux-2.6/include/asm-parisc/thread_info.h,v
retrieving revision 1.1
diff -u -p -r1.1 thread_info.h
--- include/asm-parisc/thread_info.h 29 Jul 2003 17:02:04 -0000 1.1
+++ include/asm-parisc/thread_info.h 13 Jul 2004 05:32:46 -0000
@@ -9,11 +9,11 @@
struct thread_info {
struct task_struct *task; /* main task structure */
struct exec_domain *exec_domain;/* execution domain */
- __u32 flags; /* thread_info flags (see TIF_*) */
- __u32 cpu; /* current CPU */
+ unsigned long flags; /* thread_info flags (see TIF_*) */
mm_segment_t addr_limit; /* user-level address space limit */
- struct restart_block restart_block;
+ __u32 cpu; /* current CPU */
__s32 preempt_count; /* 0=premptable, <0=BUG; will also serve as bh-counter */
+ struct restart_block restart_block;
};
#define INIT_THREAD_INFO(tsk) \
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