[parisc-linux-cvs] linux tsbogend

[Grant Grundler]

Thomas Bogendoerfer wrote:
> 	arch/parisc/kernel: entry.S 
> 
> Log message:
> set U bit in TLB for uncached memory. This is needed for mmaped IO space
> (framebuffers)

I'm surprised this is needed for "F-space". (ie 0xf...).
My understanding is the CPU is hardcoded to not cache F-space.
I thought this was true of both PA1.1 and PA2.0 machines.
Can anyone confirm/deny this?

(Note: N-class has IO addresses from 0x80000000 - 0xffffffff
and must set U-bit for uncacheable addresses.)

grant