[parisc-linux-cvs] removed documentation from bitops.h
Helge Deller
deller@gmx.de
Sun, 25 Nov 2001 23:42:03 +0100
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On Sonntag, 25. November 2001 23:41, Helge Deller wrote:
> CVSROOT: /var/cvs
> Module name: linux
> Changes by: deller 01/11/25 15:41:29
>
> Modified files:
> include/asm-parisc: bitops.h irq.h
>
> Log message:
> - removed kerneldoc documentation from the bitops functions as Matthew
> described in his mail to parisc-linux mailinglist
> - minimal patch to irq_cannonicalize() to make clear that irq2/9 refers to
> the EISA driver
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Index: bitops.h
===================================================================
RCS file: /var/cvs/linux/include/asm-parisc/bitops.h,v
retrieving revision 1.15
diff -u -p -r1.15 bitops.h
--- bitops.h 2001/11/22 23:07:57 1.15
+++ bitops.h 2001/11/25 22:38:13
@@ -6,6 +6,12 @@
#include <asm/byteorder.h>
#include <asm/atomic.h>
+/*
+ * HP-PARISC specific bit operations
+ * for a detailed description of the functions please refer
+ * to include/asm-i386/bitops.h or kerneldoc
+ */
+
#ifdef __LP64__
# define SHIFT_PER_LONG 6
#ifndef BITS_PER_LONG
@@ -24,16 +30,6 @@
#define smp_mb__before_clear_bit() smp_mb()
#define smp_mb__after_clear_bit() smp_mb()
-/**
- * set_bit - Atomically set a bit in memory
- * @nr: the bit to set
- * @addr: the address to start counting from
- *
- * This function is atomic and may not be reordered. See __set_bit()
- * if you do not require the atomic guarantees.
- * Note that @nr may be almost arbitrarily large; this function is not
- * restricted to acting on a single-word quantity.
- */
static __inline__ void set_bit(int nr, void * address)
{
unsigned long mask;
@@ -47,15 +43,6 @@ static __inline__ void set_bit(int nr, v
SPIN_UNLOCK_IRQRESTORE(ATOMIC_HASH(addr), flags);
}
-/**
- * __set_bit - Set a bit in memory
- * @nr: the bit to set
- * @addr: the address to start counting from
- *
- * Unlike set_bit(), this function is non-atomic and may be reordered.
- * If it's called on the same region of memory simultaneously, the effect
- * may be that only one operation succeeds.
- */
static __inline__ void __set_bit(int nr, void * address)
{
unsigned long mask;
@@ -66,16 +53,6 @@ static __inline__ void __set_bit(int nr,
*addr |= mask;
}
-/**
- * clear_bit - Clears a bit in memory
- * @nr: Bit to clear
- * @addr: Address to start counting from
- *
- * clear_bit() is atomic and may not be reordered. However, it does
- * not contain a memory barrier, so if it is used for locking purposes,
- * you should call smp_mb__before_clear_bit() and/or smp_mb__after_clear_bit()
- * in order to ensure changes are visible on other processors.
- */
static __inline__ void clear_bit(int nr, void * address)
{
unsigned long mask;
@@ -89,15 +66,6 @@ static __inline__ void clear_bit(int nr,
SPIN_UNLOCK_IRQRESTORE(ATOMIC_HASH(addr), flags);
}
-/**
- * change_bit - Toggle a bit in memory
- * @nr: Bit to clear
- * @addr: Address to start counting from
- *
- * change_bit() is atomic and may not be reordered.
- * Note that @nr may be almost arbitrarily large; this function is not
- * restricted to acting on a single-word quantity.
- */
static __inline__ void change_bit(int nr, void * address)
{
unsigned long mask;
@@ -111,15 +79,6 @@ static __inline__ void change_bit(int nr
SPIN_UNLOCK_IRQRESTORE(ATOMIC_HASH(addr), flags);
}
-/**
- * __change_bit - Toggle a bit in memory
- * @nr: the bit to set
- * @addr: the address to start counting from
- *
- * Unlike change_bit(), this function is non-atomic and may be reordered.
- * If it's called on the same region of memory simultaneously, the effect
- * may be that only one operation succeeds.
- */
static __inline__ void __change_bit(int nr, void * address)
{
unsigned long mask;
@@ -130,14 +89,6 @@ static __inline__ void __change_bit(int
*addr ^= mask;
}
-/**
- * test_and_set_bit - Set a bit and return its old value
- * @nr: Bit to set
- * @addr: Address to count from
- *
- * This operation is atomic and cannot be reordered.
- * It also implies a memory barrier.
- */
static __inline__ int test_and_set_bit(int nr, void * address)
{
unsigned long mask;
@@ -155,15 +106,6 @@ static __inline__ int test_and_set_bit(i
return oldbit;
}
-/**
- * __test_and_set_bit - Set a bit and return its old value
- * @nr: Bit to set
- * @addr: Address to count from
- *
- * This operation is non-atomic and can be reordered.
- * If two examples of this operation race, one can appear to succeed
- * but actually fail. You must protect multiple accesses with a lock.
- */
static __inline__ int __test_and_set_bit(int nr, void * address)
{
unsigned long mask;
@@ -178,14 +120,6 @@ static __inline__ int __test_and_set_bit
return oldbit;
}
-/**
- * test_and_clear_bit - Clear a bit and return its old value
- * @nr: Bit to set
- * @addr: Address to count from
- *
- * This operation is atomic and cannot be reordered.
- * It also implies a memory barrier.
- */
static __inline__ int test_and_clear_bit(int nr, void * address)
{
unsigned long mask;
@@ -203,15 +137,6 @@ static __inline__ int test_and_clear_bit
return oldbit;
}
-/**
- * __test_and_clear_bit - Clear a bit and return its old value
- * @nr: Bit to set
- * @addr: Address to count from
- *
- * This operation is non-atomic and can be reordered.
- * If two examples of this operation race, one can appear to succeed
- * but actually fail. You must protect multiple accesses with a lock.
- */
static __inline__ int __test_and_clear_bit(int nr, void * address)
{
unsigned long mask;
@@ -226,14 +151,6 @@ static __inline__ int __test_and_clear_b
return oldbit;
}
-/**
- * test_and_change_bit - Change a bit and return its new value
- * @nr: Bit to set
- * @addr: Address to count from
- *
- * This operation is atomic and cannot be reordered.
- * It also implies a memory barrier.
- */
static __inline__ int test_and_change_bit(int nr, void * address)
{
unsigned long mask;
@@ -251,15 +168,6 @@ static __inline__ int test_and_change_bi
return oldbit;
}
-/**
- * __test_and_change_bit - Change a bit and return its new value
- * @nr: Bit to set
- * @addr: Address to count from
- *
- * This operation is non-atomic and can be reordered.
- * If two examples of this operation race, one can appear to succeed
- * but actually fail. You must protect multiple accesses with a lock.
- */
static __inline__ int __test_and_change_bit(int nr, void * address)
{
unsigned long mask;
@@ -274,11 +182,6 @@ static __inline__ int __test_and_change_
return oldbit;
}
-/**
- * test_bit - Determine whether a bit is set
- * @nr: bit number to test
- * @addr: Address to start counting from
- */
static __inline__ int test_bit(int nr, const void *address)
{
unsigned long mask;
@@ -290,12 +193,6 @@ static __inline__ int test_bit(int nr, c
return !!(*addr & mask);
}
-/**
- * ffz - find first zero in word.
- * @word: The word to search
- *
- * Undefined if no zero exists, so code should check against ~0UL first.
- */
extern __inline__ unsigned long ffz(unsigned long word)
{
unsigned long result;
@@ -337,12 +234,6 @@ extern __inline__ unsigned long ffz(unsi
#define find_first_zero_bit(addr, size) \
find_next_zero_bit((addr), (size), 0)
-/**
- * find_next_zero_bit - find the first zero bit in a memory region
- * @addr: The address to base the search on
- * @offset: The bitnumber to start searching at
- * @size: The maximum size to search
- */
static __inline__ unsigned long find_next_zero_bit(void * addr, unsigned long size, unsigned long offset)
{
unsigned long * p = ((unsigned long *) addr) + (offset >> SHIFT_PER_LONG);
Index: irq.h
===================================================================
RCS file: /var/cvs/linux/include/asm-parisc/irq.h,v
retrieving revision 1.18
diff -u -p -r1.18 irq.h
--- irq.h 2001/11/05 07:42:15 1.18
+++ irq.h 2001/11/25 22:38:13
@@ -68,7 +68,8 @@ extern struct irq_region *irq_region[NR_
static __inline__ int irq_cannonicalize(int irq)
{
#ifdef CONFIG_EISA
- return (irq==2 ? 9:irq);
+ return (irq == (IRQ_FROM_REGION(EISA_IRQ_REGION)+2)
+ ? (IRQ_FROM_REGION(EISA_IRQ_REGION)+9) : irq);
#else
return irq;
#endif
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