[parisc-linux-cvs] linux deller

Helge Deller deller@gmx.de
Fri, 23 Nov 2001 00:11:34 +0100


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On Friday 23 November 2001 00:07, Helge Deller wrote:
> CVSROOT:	/var/cvs
> Module name:	linux
> Changes by:	deller	01/11/22 16:07:57
>
> Modified files:
> 	.              : Makefile
> 	include/asm-parisc: bitops.h
>
> Log message:
> - 2.4.14-pa9
> - add a few bitops inline functions to make devfs compile & working
> - added docbook comments to the bitop functions (taken from
> include/asm-i386/bitops.h)


- should be rewritten in assembler later
- this diff is nearly impossible to read since I moved a few functions around...
- tested, but it would be nice if someone looks over it again


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Index: Makefile
===================================================================
RCS file: /var/cvs/linux/Makefile,v
retrieving revision 1.200
diff -u -p -r1.200 Makefile
--- Makefile	2001/11/21 15:16:39	1.200
+++ Makefile	2001/11/22 23:05:14
@@ -1,7 +1,7 @@
 VERSION = 2
 PATCHLEVEL = 4
 SUBLEVEL = 14
-EXTRAVERSION = -pa8
+EXTRAVERSION = -pa9
 
 KERNELRELEASE=$(VERSION).$(PATCHLEVEL).$(SUBLEVEL)$(EXTRAVERSION)
 
Index: bitops.h
===================================================================
RCS file: /var/cvs/linux/include/asm-parisc/bitops.h,v
retrieving revision 1.14
diff -u -p -r1.14 bitops.h
--- bitops.h	2001/09/06 09:44:12	1.14
+++ bitops.h	2001/11/22 23:05:47
@@ -20,24 +20,63 @@
 
 #define CHOP_SHIFTCOUNT(x) ((x) & (BITS_PER_LONG - 1))
 
-static __inline__ int test_and_set_bit(int nr, void * address)
+
+#define smp_mb__before_clear_bit()      smp_mb()
+#define smp_mb__after_clear_bit()       smp_mb()
+
+/**
+ * set_bit - Atomically set a bit in memory
+ * @nr: the bit to set
+ * @addr: the address to start counting from
+ *
+ * This function is atomic and may not be reordered.  See __set_bit()
+ * if you do not require the atomic guarantees.
+ * Note that @nr may be almost arbitrarily large; this function is not
+ * restricted to acting on a single-word quantity.
+ */
+static __inline__ void set_bit(int nr, void * address)
 {
 	unsigned long mask;
 	unsigned long *addr = (unsigned long *) address;
-	int oldbit;
 	unsigned long flags;
 
 	addr += (nr >> SHIFT_PER_LONG);
 	mask = 1L << CHOP_SHIFTCOUNT(nr);
 	SPIN_LOCK_IRQSAVE(ATOMIC_HASH(addr), flags);
-	oldbit = (*addr & mask) ? 1 : 0;
 	*addr |= mask;
 	SPIN_UNLOCK_IRQRESTORE(ATOMIC_HASH(addr), flags);
+}
 
-	return oldbit;
+/**
+ * __set_bit - Set a bit in memory
+ * @nr: the bit to set
+ * @addr: the address to start counting from
+ *
+ * Unlike set_bit(), this function is non-atomic and may be reordered.
+ * If it's called on the same region of memory simultaneously, the effect
+ * may be that only one operation succeeds.
+ */
+static __inline__ void __set_bit(int nr, void * address)
+{
+	unsigned long mask;
+	unsigned long *addr = (unsigned long *) address;
+
+	addr += (nr >> SHIFT_PER_LONG);
+	mask = 1L << CHOP_SHIFTCOUNT(nr);
+	*addr |= mask;
 }
 
-static __inline__ void set_bit(int nr, void * address)
+/**
+ * clear_bit - Clears a bit in memory
+ * @nr: Bit to clear
+ * @addr: Address to start counting from
+ *
+ * clear_bit() is atomic and may not be reordered.  However, it does
+ * not contain a memory barrier, so if it is used for locking purposes,
+ * you should call smp_mb__before_clear_bit() and/or smp_mb__after_clear_bit()
+ * in order to ensure changes are visible on other processors.
+ */
+static __inline__ void clear_bit(int nr, void * address)
 {
 	unsigned long mask;
 	unsigned long *addr = (unsigned long *) address;
@@ -46,41 +85,108 @@ static __inline__ void set_bit(int nr, v
 	addr += (nr >> SHIFT_PER_LONG);
 	mask = 1L << CHOP_SHIFTCOUNT(nr);
 	SPIN_LOCK_IRQSAVE(ATOMIC_HASH(addr), flags);
-	*addr |= mask;
+	*addr &= ~mask;
 	SPIN_UNLOCK_IRQRESTORE(ATOMIC_HASH(addr), flags);
 }
 
-static __inline__ int test_and_clear_bit(int nr, void * address)
+/**
+ * change_bit - Toggle a bit in memory
+ * @nr: Bit to clear
+ * @addr: Address to start counting from
+ *
+ * change_bit() is atomic and may not be reordered.
+ * Note that @nr may be almost arbitrarily large; this function is not
+ * restricted to acting on a single-word quantity.
+ */
+static __inline__ void change_bit(int nr, void * address)
 {
 	unsigned long mask;
 	unsigned long *addr = (unsigned long *) address;
-	int oldbit;
 	unsigned long flags;
 
 	addr += (nr >> SHIFT_PER_LONG);
 	mask = 1L << CHOP_SHIFTCOUNT(nr);
 	SPIN_LOCK_IRQSAVE(ATOMIC_HASH(addr), flags);
-	oldbit = (*addr & mask) ? 1 : 0;
-	*addr &= ~mask;
+	*addr ^= mask;
 	SPIN_UNLOCK_IRQRESTORE(ATOMIC_HASH(addr), flags);
+}
 
-	return oldbit;
+/**
+ * __change_bit - Toggle a bit in memory
+ * @nr: the bit to set
+ * @addr: the address to start counting from
+ *
+ * Unlike change_bit(), this function is non-atomic and may be reordered.
+ * If it's called on the same region of memory simultaneously, the effect
+ * may be that only one operation succeeds.
+ */
+static __inline__ void __change_bit(int nr, void * address)
+{
+	unsigned long mask;
+	unsigned long *addr = (unsigned long *) address;
+
+	addr += (nr >> SHIFT_PER_LONG);
+	mask = 1L << CHOP_SHIFTCOUNT(nr);
+	*addr ^= mask;
 }
 
-static __inline__ void clear_bit(int nr, void * address)
+/**
+ * test_and_set_bit - Set a bit and return its old value
+ * @nr: Bit to set
+ * @addr: Address to count from
+ *
+ * This operation is atomic and cannot be reordered.  
+ * It also implies a memory barrier.
+ */
+static __inline__ int test_and_set_bit(int nr, void * address)
 {
 	unsigned long mask;
 	unsigned long *addr = (unsigned long *) address;
+	int oldbit;
 	unsigned long flags;
 
 	addr += (nr >> SHIFT_PER_LONG);
 	mask = 1L << CHOP_SHIFTCOUNT(nr);
 	SPIN_LOCK_IRQSAVE(ATOMIC_HASH(addr), flags);
-	*addr &= ~mask;
+	oldbit = (*addr & mask) ? 1 : 0;
+	*addr |= mask;
 	SPIN_UNLOCK_IRQRESTORE(ATOMIC_HASH(addr), flags);
+
+	return oldbit;
 }
 
-static __inline__ int test_and_change_bit(int nr, void * address)
+/**
+ * __test_and_set_bit - Set a bit and return its old value
+ * @nr: Bit to set
+ * @addr: Address to count from
+ *
+ * This operation is non-atomic and can be reordered.  
+ * If two examples of this operation race, one can appear to succeed
+ * but actually fail.  You must protect multiple accesses with a lock.
+ */
+static __inline__ int __test_and_set_bit(int nr, void * address)
+{
+	unsigned long mask;
+	unsigned long *addr = (unsigned long *) address;
+	int oldbit;
+
+	addr += (nr >> SHIFT_PER_LONG);
+	mask = 1L << CHOP_SHIFTCOUNT(nr);
+	oldbit = (*addr & mask) ? 1 : 0;
+	*addr |= mask;
+
+	return oldbit;
+}
+
+/**
+ * test_and_clear_bit - Clear a bit and return its old value
+ * @nr: Bit to set
+ * @addr: Address to count from
+ *
+ * This operation is atomic and cannot be reordered.  
+ * It also implies a memory barrier.
+ */
+static __inline__ int test_and_clear_bit(int nr, void * address)
 {
 	unsigned long mask;
 	unsigned long *addr = (unsigned long *) address;
@@ -91,54 +197,89 @@ static __inline__ int test_and_change_bi
 	mask = 1L << CHOP_SHIFTCOUNT(nr);
 	SPIN_LOCK_IRQSAVE(ATOMIC_HASH(addr), flags);
 	oldbit = (*addr & mask) ? 1 : 0;
-	*addr ^= mask;
+	*addr &= ~mask;
 	SPIN_UNLOCK_IRQRESTORE(ATOMIC_HASH(addr), flags);
 
 	return oldbit;
 }
 
-static __inline__ int __test_and_change_bit(int nr, void * address)
+/**
+ * __test_and_clear_bit - Clear a bit and return its old value
+ * @nr: Bit to set
+ * @addr: Address to count from
+ *
+ * This operation is non-atomic and can be reordered.  
+ * If two examples of this operation race, one can appear to succeed
+ * but actually fail.  You must protect multiple accesses with a lock.
+ */
+static __inline__ int __test_and_clear_bit(int nr, void * address)
 {
 	unsigned long mask;
 	unsigned long *addr = (unsigned long *) address;
 	int oldbit;
 
 	addr += (nr >> SHIFT_PER_LONG);
-
 	mask = 1L << CHOP_SHIFTCOUNT(nr);
 	oldbit = (*addr & mask) ? 1 : 0;
-	*addr ^= mask;
+	*addr &= ~mask;
 
 	return oldbit;
 }
 
-static __inline__ void change_bit(int nr, void * address)
+/**
+ * test_and_change_bit - Change a bit and return its new value
+ * @nr: Bit to set
+ * @addr: Address to count from
+ *
+ * This operation is atomic and cannot be reordered.  
+ * It also implies a memory barrier.
+ */
+static __inline__ int test_and_change_bit(int nr, void * address)
 {
 	unsigned long mask;
 	unsigned long *addr = (unsigned long *) address;
+	int oldbit;
 	unsigned long flags;
 
 	addr += (nr >> SHIFT_PER_LONG);
 	mask = 1L << CHOP_SHIFTCOUNT(nr);
 	SPIN_LOCK_IRQSAVE(ATOMIC_HASH(addr), flags);
+	oldbit = (*addr & mask) ? 1 : 0;
 	*addr ^= mask;
 	SPIN_UNLOCK_IRQRESTORE(ATOMIC_HASH(addr), flags);
+
+	return oldbit;
 }
 
-/* see asm-i386/bitops.h */
-static __inline__ void __change_bit(int nr, void * address)
+/**
+ * __test_and_change_bit - Change a bit and return its new value
+ * @nr: Bit to set
+ * @addr: Address to count from
+ *
+ * This operation is non-atomic and can be reordered.  
+ * If two examples of this operation race, one can appear to succeed
+ * but actually fail.  You must protect multiple accesses with a lock.
+ */
+static __inline__ int __test_and_change_bit(int nr, void * address)
 {
 	unsigned long mask;
 	unsigned long *addr = (unsigned long *) address;
+	int oldbit;
 
 	addr += (nr >> SHIFT_PER_LONG);
 	mask = 1L << CHOP_SHIFTCOUNT(nr);
+	oldbit = (*addr & mask) ? 1 : 0;
 	*addr ^= mask;
-}
 
-/* again, the read-only case doesn't have to do any locking */
+	return oldbit;
+}
 
-static __inline__ int test_bit(int nr, const volatile void *address)
+/**
+ * test_bit - Determine whether a bit is set
+ * @nr: bit number to test
+ * @addr: Address to start counting from
+ */
+static __inline__ int test_bit(int nr, const void *address)
 {
 	unsigned long mask;
 	unsigned long *addr = (unsigned long *) address;
@@ -149,17 +290,18 @@ static __inline__ int test_bit(int nr, c
 	return !!(*addr & mask);
 }
 
-#define smp_mb__before_clear_bit()      smp_mb()
-#define smp_mb__after_clear_bit()       smp_mb()
-
-/* XXX We'd need some binary search here */
-
+/**
+ * ffz - find first zero in word.
+ * @word: The word to search
+ *
+ * Undefined if no zero exists, so code should check against ~0UL first.
+ */
 extern __inline__ unsigned long ffz(unsigned long word)
 {
 	unsigned long result;
 
 	result = 0;
-	while(word & 1) {
+	while (word & 1) {
 		result++;
 		word >>= 1;
 	}
@@ -195,6 +337,12 @@ extern __inline__ unsigned long ffz(unsi
 #define find_first_zero_bit(addr, size) \
 	find_next_zero_bit((addr), (size), 0)
 
+/**
+ * find_next_zero_bit - find the first zero bit in a memory region
+ * @addr: The address to base the search on
+ * @offset: The bitnumber to start searching at
+ * @size: The maximum size to search
+ */
 static __inline__ unsigned long find_next_zero_bit(void * addr, unsigned long size, unsigned long offset)
 {
 	unsigned long * p = ((unsigned long *) addr) + (offset >> SHIFT_PER_LONG);

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