[parisc-linux-cvs] pdc.h changes

Helge Deller deller@gmx.de
Tue, 13 Nov 2001 23:28:15 +0100


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> - whitespace cleanups
> - added PDC_SOFT_POWER(23) PDC call


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Index: pdc.h
===================================================================
RCS file: /var/cvs/linux/include/asm-parisc/pdc.h,v
retrieving revision 1.36
diff -u -p -r1.36 pdc.h
--- pdc.h	2001/10/29 17:53:16	1.36
+++ pdc.h	2001/11/13 22:22:06
@@ -2,8 +2,27 @@
 #define _PARISC_PDC_H
 
 /*
-    PDC entry points...
-*/
+ *	PDC return values ...
+ *	All PDC calls return a subset of these errors. 
+ */
+
+#define PDC_WARN		  3	/* Call completed with a warning */
+#define PDC_REQ_ERR_1		  2	/* See above			 */
+#define PDC_REQ_ERR_0		  1	/* Call would generate a requestor error */
+#define PDC_OK			  0	/* Call completed successfully	*/
+#define PDC_BAD_PROC		 -1	/* Called non-existent procedure*/
+#define PDC_BAD_OPTION		 -2	/* Called with non-existent option */
+#define PDC_ERROR		 -3	/* Call could not complete without an error */
+#define PDC_NE_MOD		 -5	/* Module not found		*/
+#define PDC_NE_CELL_MOD		 -7	/* Cell module not found	*/
+#define PDC_INVALID_ARG		-10	/* Called with an invalid argument */
+#define PDC_BUS_POW_WARN	-12	/* Call could not complete in allowed power budget */
+#define PDC_NOT_NARROW		-17	/* Narrow mode not supported	*/
+
+
+/*
+ *	PDC entry points...
+ */
 
 #define PDC_POW_FAIL	1		/* perform a power-fail		*/
 #define PDC_POW_FAIL_PREPARE	0	/* prepare for powerfail	*/
@@ -38,40 +57,40 @@
 #define PDC_CACHE_SET_COH	1	/* set coherence state		*/
 #define PDC_CACHE_RET_SPID	2	/* returns space-ID bits	*/
 
-#define PDC_HPA	 6       	/* return HPA of processor */
-#define PDC_HPA_PROCESSOR       0
-#define PDC_HPA_MODULES	 1
-
-#define PDC_COPROC	7       /* Co-Processor (usually FP unit(s)) */
-#define PDC_COPROC_CFG	0       /* Co-Processor Cfg (FP unit(s) enabled?) */
-
-#define PDC_IODC	8       /* talk to IODC */
-#define PDC_IODC_READ	   0       /* read IODC entry point */
-/*      PDC_IODC_RI_*		      INDEX parameter of PDC_IODC_READ   */
-#define PDC_IODC_RI_DATA_BYTES	0	/* IODC Data Bytes		    */
-/*				1, 2	   obsolete - HVERSION dependent      */
-#define PDC_IODC_RI_INIT	3	/* Initialize module		  */
+#define PDC_HPA		6		/* return HPA of processor	*/
+#define PDC_HPA_PROCESSOR	0
+#define PDC_HPA_MODULES		1
+
+#define PDC_COPROC	7		/* Co-Processor (usually FP unit(s)) */
+#define PDC_COPROC_CFG		0	/* Co-Processor Cfg (FP unit(s) enabled?) */
+
+#define PDC_IODC	8		/* talk to IODC			*/
+#define PDC_IODC_READ		0	/* read IODC entry point	*/
+/*      PDC_IODC_RI_			 * INDEX parameter of PDC_IODC_READ */
+#define PDC_IODC_RI_DATA_BYTES	0	/* IODC Data Bytes		*/
+/*				1, 2	   obsolete - HVERSION dependent*/
+#define PDC_IODC_RI_INIT	3	/* Initialize module		*/
 #define PDC_IODC_RI_IO		4	/* Module input/output		*/
 #define PDC_IODC_RI_SPA		5	/* Module input/output		*/
 #define PDC_IODC_RI_CONFIG	6	/* Module input/output		*/
-/*				7	  obsolete - HVERSION dependent      */
+/*				7	  obsolete - HVERSION dependent */
 #define PDC_IODC_RI_TEST	8	/* Module input/output		*/
 #define PDC_IODC_RI_TLB		9	/* Module input/output		*/
-#define PDC_IODC_NINIT	  2       /* non-destructive init */
-#define PDC_IODC_DINIT	  3       /* destructive init */
-#define PDC_IODC_MEMERR	 4       /* check for memory errors */
-#define PDC_IODC_INDEX_DATA     0       /* get first 16 bytes from mod IODC */
-#define PDC_IODC_BUS_ERROR      -4      /* bus error return value */
-#define PDC_IODC_INVALID_INDEX  -5      /* invalid index return value */
-#define PDC_IODC_COUNT	  -6      /* count is too small */
-
-#define	PDC_TOD		9		/* time-of-day clock (TOD) */
-#define	PDC_TOD_READ		0	/* read TOD  */
-#define	PDC_TOD_WRITE		1	/* write TOD */
-#define	PDC_TOD_ITIMER		2	/* calibrate Interval Timer (CR16) */
+#define PDC_IODC_NINIT		2	/* non-destructive init		*/
+#define PDC_IODC_DINIT		3	/* destructive init		*/
+#define PDC_IODC_MEMERR		4	/* check for memory errors	*/
+#define PDC_IODC_INDEX_DATA	0	/* get first 16 bytes from mod IODC */
+#define PDC_IODC_BUS_ERROR	-4	/* bus error return value	*/
+#define PDC_IODC_INVALID_INDEX	-5	/* invalid index return value	*/
+#define PDC_IODC_COUNT		-6	/* count is too small		*/
+
+#define PDC_TOD		9		/* time-of-day clock (TOD)	*/
+#define PDC_TOD_READ		0	/* read TOD			*/
+#define PDC_TOD_WRITE		1	/* write TOD			*/
+#define PDC_TOD_ITIMER		2	/* calibrate Interval Timer (CR16) */
 
-#define PDC_ADD_VALID	12    		/* Memory validation PDC call */
-#define PDC_ADD_VALID_VERIFY  0    	/* Make PDC_ADD_VALID verify region */
+#define PDC_ADD_VALID	12		/* Memory validation PDC call	*/
+#define PDC_ADD_VALID_VERIFY	0	/* Make PDC_ADD_VALID verify region */
 
 #define PDC_INSTR	15		/* get instr to invoke PDCE_CHECK() */
 
@@ -85,97 +104,86 @@
 #define PDC_TLB_INFO		0	/* returns parameter 		*/
 #define PDC_TLB_SETUP		1	/* set up miss handling 	*/
 
-#define PDC_MEM         20              /* Manage memory */
-#define PDC_MEM_TABLE           128     /* Non contig mem map (sprockets) */
+#define PDC_MEM		20		/* Manage memory		*/
+#define PDC_MEM_TABLE		128	/* Non contig mem map (sprockets) */
 
 #define PDC_PSW		21		/* Get/Set default System Mask  */
-#define PDC_PSW_MASK            0	/* Return mask                  */
-#define PDC_PSW_GET_DEFAULTS    1	/* Return defaults              */
-#define PDC_PSW_SET_DEFAULTS    2	/* Set default                  */
+#define PDC_PSW_MASK		0	/* Return mask                  */
+#define PDC_PSW_GET_DEFAULTS	1	/* Return defaults              */
+#define PDC_PSW_SET_DEFAULTS	2	/* Set default                  */
 #define PDC_PSW_ENDIAN_BIT	1	/* set for big endian           */
 #define PDC_PSW_WIDE_BIT	2	/* set for wide mode            */ 
 
-#define PDC_SYSTEM_MAP	22		/* find system modules */
+#define PDC_SYSTEM_MAP	22		/* find system modules		*/
 #define PDC_FIND_MODULE 	0
-#define PDC_FIND_ADDRESS        1
+#define PDC_FIND_ADDRESS	1
+
+#define PDC_SOFT_POWER	23		/* soft power switch		*/
+#define PDC_SOFT_POWER_INFO	0	/* return info about the soft power switch */
+#define PDC_SOFT_POWER_ENABLE	1	/* enable/disable soft power switch */
 
 
 /* HVERSION dependent */
+
+/* The PDC_MEM_MAP calls */
+#define PDC_MEM_MAP	128		/* on s700: return page info	*/
+#define PDC_MEM_MAP_HPA		0	/* returns hpa of a module	*/
 
-#define PDC_IO			135	/* log error info, reset IO system  */
+#define PDC_IO		135		/* log error info, reset IO system */
 
-#define PDC_BROADCAST_RESET	136	/* reset all processors	     */
-#define PDC_DO_RESET            0UL	/* option: perform a broadcast reset */
-#define PDC_DO_FIRM_TEST_RESET  1UL	/* Do broadcast reset with bitmap */
-#define PDC_BR_RECONFIGURATION  2UL	/* reset w/reconfiguration */
-#define PDC_FIRM_TEST_MAGIC 	0xab9ec36fUL    /* for this reboot only */
+#define PDC_BROADCAST_RESET 136		/* reset all processors		*/
+#define PDC_DO_RESET		0	/* option: perform a broadcast reset */
+#define PDC_DO_FIRM_TEST_RESET	1	/* Do broadcast reset with bitmap */
+#define PDC_BR_RECONFIGURATION	2	/* reset w/reconfiguration	*/
+#define PDC_FIRM_TEST_MAGIC	0xab9ec36fUL    /* for this reboot only	*/
 
-#define PDC_LAN_STATION_ID      138     /* Hversion dependent mechanism for */
-#define PDC_LAN_STATION_ID_READ 0       /* getting the lan station address  */
+#define PDC_LAN_STATION_ID 138		/* Hversion dependent mechanism for */
+#define PDC_LAN_STATION_ID_READ	0	/* getting the lan station address  */
 
 #define	PDC_LAN_STATION_ID_SIZE	6
 
 /* Legacy PDC definitions for same stuff */
-#define PDC_PCI_INDEX		   147UL
-#define PDC_PCI_GET_INT_TBL_SIZE	13UL
-#define PDC_PCI_GET_INT_TBL	     14UL
-
-/* All PDC calls return a subset of these errors. */
-
-#define PDC_WARN		  3 /* Call completed with a warning */
-#define PDC_REQ_ERR_1		  2 /* See above */
-#define PDC_REQ_ERR_0		  1 /* Call would generate a requestor error */
-#define PDC_OK			  0 /* Call completed successfully */
-#define PDC_BAD_PROC		 -1 /* Called non-existent procedure */
-#define PDC_BAD_OPTION		 -2 /* Called with non-existent option */
-#define PDC_ERROR		 -3 /* Call could not complete without an error */
-#define PDC_NE_MOD		 -5 /* Module not found */
-#define PDC_NE_CELL_MOD		 -7 /* Cell module not found */
-#define PDC_INVALID_ARG		-10 /* Called with an invalid argument */
-#define PDC_BUS_POW_WARN	-12 /* Call could not complete in allowed power budget */
-#define PDC_NOT_NARROW		-17 /* Narrow mode not supported */
-
+#define PDC_PCI_INDEX	147
+#define PDC_PCI_GET_INT_TBL_SIZE 13
+#define PDC_PCI_GET_INT_TBL	 14
 
-/* The PDC_MEM_MAP calls */
 
-#define PDC_MEM_MAP	    128
-#define PDC_MEM_MAP_HPA		0
 
 /* constants for OS (NVM...) */
-#define OS_ID_NONE	0
-#define OS_ID_HPUX	1
-#define OS_ID_MPEXL	2
-#define OS_ID_OSF	3
-#define OS_ID_LINUX	OS_ID_HPUX
+#define OS_ID_NONE		0
+#define OS_ID_HPUX		1
+#define OS_ID_MPEXL		2
+#define OS_ID_OSF		3
+#define OS_ID_LINUX		OS_ID_HPUX /* just use the same value as hpux */
 
 /* constants for PDC_CHASSIS */
-#define OSTAT_OFF		      0
-#define OSTAT_FLT		      1 
-#define OSTAT_TEST		     2
-#define OSTAT_INIT		     3
-#define OSTAT_SHUT		     4
-#define OSTAT_WARN		     5
-#define OSTAT_RUN		      6
-#define OSTAT_ON		       7
+#define OSTAT_OFF		0
+#define OSTAT_FLT		1 
+#define OSTAT_TEST		2
+#define OSTAT_INIT		3
+#define OSTAT_SHUT		4
+#define OSTAT_WARN		5
+#define OSTAT_RUN		6
+#define OSTAT_ON		7
 
 #ifdef __LP64__
 /* PDC PAT CELL */
-#define PDC_PAT_CELL           	64L   /* Interface for gaining and 
-                                         * manipulating cell state within PD */
-#define PDC_PAT_CELL_GET_NUMBER    0L   /* Return Cell number */
-#define PDC_PAT_CELL_GET_INFO      1L   /* Returns info about Cell */
-#define PDC_PAT_CELL_MODULE        2L   /* Returns info about Module */
-#define PDC_PAT_CELL_SET_ATTENTION 9L   /* Set Cell Attention indicator */
-#define PDC_PAT_CELL_NUMBER_TO_LOC 10L   /* Cell Number -> Location */
-#define PDC_PAT_CELL_WALK_FABRIC   11L   /* Walk the Fabric */
-#define PDC_PAT_CELL_GET_RDT_SIZE  12L   /* Return Route Distance Table Sizes */
-#define PDC_PAT_CELL_GET_RDT       13L   /* Return Route Distance Tables */
-#define PDC_PAT_CELL_GET_LOCAL_PDH_SZ 14L /* Read Local PDH Buffer Size */
-#define PDC_PAT_CELL_SET_LOCAL_PDH    15L  /* Write Local PDH Buffer */
+#define PDC_PAT_CELL	64L		/* Interface for gaining and 
+					 * manipulating cell state within PD */
+#define PDC_PAT_CELL_GET_NUMBER	   0L	/* Return Cell number		*/
+#define PDC_PAT_CELL_GET_INFO      1L	/* Returns info about Cell	*/
+#define PDC_PAT_CELL_MODULE        2L	/* Returns info about Module	*/
+#define PDC_PAT_CELL_SET_ATTENTION 9L	/* Set Cell Attention indicator	*/
+#define PDC_PAT_CELL_NUMBER_TO_LOC 10L	/* Cell Number -> Location	*/
+#define PDC_PAT_CELL_WALK_FABRIC   11L	/* Walk the Fabric		*/
+#define PDC_PAT_CELL_GET_RDT_SIZE  12L	/* Return Route Distance Table Sizes */
+#define PDC_PAT_CELL_GET_RDT       13L	/* Return Route Distance Tables	*/
+#define PDC_PAT_CELL_GET_LOCAL_PDH_SZ  14L /* Read Local PDH Buffer Size*/
+#define PDC_PAT_CELL_SET_LOCAL_PDH     15L /* Write Local PDH Buffer	*/
 #define PDC_PAT_CELL_GET_REMOTE_PDH_SZ 16L /* Return Remote PDH Buffer Size */
-#define PDC_PAT_CELL_GET_REMOTE_PDH 17L /* Read Remote PDH Buffer */
-#define PDC_PAT_CELL_GET_DBG_INFO   128L  /* Return DBG Buffer Info */
-#define PDC_PAT_CELL_CHANGE_ALIAS   129L  /* Change Non-Equivalent Alias Checking */
+#define PDC_PAT_CELL_GET_REMOTE_PDH    17L /* Read Remote PDH Buffer	*/
+#define PDC_PAT_CELL_GET_DBG_INFO  128L	/* Return DBG Buffer Info	*/
+#define PDC_PAT_CELL_CHANGE_ALIAS  129L	/* Change Non-Equivalent Alias Checking */
 
 /*
 ** Arg to PDC_PAT_CELL_MODULE memaddr[4]
@@ -183,157 +191,148 @@
 ** Addresses on the Merced Bus != all Runway Bus addresses.
 ** This is intended for programming SBA/LBA chips range registers.
 */
-#define IO_VIEW      0UL
-#define PA_VIEW      1UL
+#define IO_VIEW			0UL
+#define PA_VIEW			1UL
 
 /* PDC_PAT_CELL_MODULE entity type values */
-#define	PAT_ENTITY_CA	0	/* central agent */
-#define	PAT_ENTITY_PROC	1	/* processor */
-#define	PAT_ENTITY_MEM	2	/* memory controller */
-#define	PAT_ENTITY_SBA	3	/* system bus adapter */
-#define	PAT_ENTITY_LBA	4	/* local bus adapter */
-#define	PAT_ENTITY_PBC	5	/* processor bus converter */
-#define	PAT_ENTITY_XBC	6	/* crossbar fabric connect */
-#define	PAT_ENTITY_RC	7	/* fabric interconnect */
+#define PAT_ENTITY_CA		0	/* central agent	*/
+#define PAT_ENTITY_PROC		1	/* processor		*/
+#define PAT_ENTITY_MEM		2	/* memory controller	*/
+#define PAT_ENTITY_SBA		3	/* system bus adapter	*/
+#define PAT_ENTITY_LBA		4	/* local bus adapter	*/
+#define PAT_ENTITY_PBC		5	/* processor bus converter */
+#define PAT_ENTITY_XBC		6	/* crossbar fabric connect */
+#define PAT_ENTITY_RC		7	/* fabric interconnect	*/
 
 /* PDC_PAT_CELL_MODULE address range type values */
-#define PAT_PBNUM           0         /* PCI Bus Number */
-#define PAT_LMMIO           1         /* < 4G MMIO Space */
-#define PAT_GMMIO           2         /* > 4G MMIO Space */
-#define PAT_NPIOP           3         /* Non Postable I/O Port Space */
-#define PAT_PIOP            4         /* Postable I/O Port Space */
-#define PAT_AHPA            5         /* Additional HPA Space */
-#define PAT_UFO             6         /* HPA Space (UFO for Mariposa) */
-#define PAT_GNIP            7         /* GNI Reserved Space */
+#define PAT_PBNUM		0	/* PCI Bus Number	*/
+#define PAT_LMMIO		1	/* < 4G MMIO Space	*/
+#define PAT_GMMIO		2	/* > 4G MMIO Space	*/
+#define PAT_NPIOP		3	/* Non Postable I/O Port Space */
+#define PAT_PIOP		4	/* Postable I/O Port Space */
+#define PAT_AHPA		5	/* Additional HPA Space	*/
+#define PAT_UFO			6	/* HPA Space (UFO for Mariposa) */
+#define PAT_GNIP		7	/* GNI Reserved Space	*/
 
 
 /* PDC PAT CHASSIS LOG */
+#define PDC_PAT_CHASSIS_LOG	65L	/* Platform logging & forward
+					 ** progress functions	*/
+#define PDC_PAT_CHASSIS_WRITE_LOG	0L /* Write Log Entry	*/
+#define PDC_PAT_CHASSIS_READ_LOG	1L /* Read  Log Entry	*/
 
-#define PDC_PAT_CHASSIS_LOG		65L /* Platform logging & forward
-					    ** progress functions */
-#define PDC_PAT_CHASSIS_WRITE_LOG    	0L /* Write Log Entry */
-#define PDC_PAT_CHASSIS_READ_LOG     	1L /* Read  Log Entry */
 
 /* PDC PAT CPU  */
-
-#define PDC_PAT_CPU                	67L /* Interface to CPU configuration
-                                        	* within the protection domain */
-#define PDC_PAT_CPU_INFO            	0L /* Return CPU config info */
-#define PDC_PAT_CPU_DELETE          	1L /* Delete CPU */
-#define PDC_PAT_CPU_ADD             	2L /* Add    CPU */
-#define PDC_PAT_CPU_GET_NUMBER      	3L /* Return CPU Number */
-#define PDC_PAT_CPU_GET_HPA         	4L /* Return CPU HPA */
-#define PDC_PAT_CPU_STOP            	5L /* Stop   CPU */
-#define PDC_PAT_CPU_RENDEZVOUS      	6L /* Rendezvous CPU */
-#define PDC_PAT_CPU_GET_CLOCK_INFO  	7L /* Return CPU Clock info */
-#define PDC_PAT_CPU_GET_RENDEZVOUS_STATE 8L /* Return Rendezvous State */
-#define PDC_PAT_CPU_PLUNGE_FABRIC 	128L /* Plunge Fabric */
+#define PDC_PAT_CPU		67L	/* Interface to CPU configuration
+					 * within the protection domain */
+#define PDC_PAT_CPU_INFO		0L /* Return CPU config info	*/
+#define PDC_PAT_CPU_DELETE		1L /* Delete CPU		*/
+#define PDC_PAT_CPU_ADD			2L /* Add    CPU		*/
+#define PDC_PAT_CPU_GET_NUMBER		3L /* Return CPU Number		*/
+#define PDC_PAT_CPU_GET_HPA		4L /* Return CPU HPA		*/
+#define PDC_PAT_CPU_STOP            	5L /* Stop   CPU		*/
+#define PDC_PAT_CPU_RENDEZVOUS      	6L /* Rendezvous CPU		*/
+#define PDC_PAT_CPU_GET_CLOCK_INFO  	7L /* Return CPU Clock info	*/
+#define PDC_PAT_CPU_GET_RENDEZVOUS_STATE 8L /* Return Rendezvous State	*/
+#define PDC_PAT_CPU_PLUNGE_FABRIC	128L /* Plunge Fabric		*/
 #define PDC_PAT_CPU_UPDATE_CACHE_CLEANSING 129L /* Manipulate Cache 
-                                                 * Cleansing Mode */
-/*  PDC PAT EVENT */
+                                                 * Cleansing Mode	*/
 
-#define PDC_PAT_EVENT              	68L /* Interface to Platform Events */
-#define PDC_PAT_EVENT_GET_CAPS     	0L /* Get Capabilities */
-#define PDC_PAT_EVENT_SET_MODE     	1L /* Set Notification Mode */
-#define PDC_PAT_EVENT_SCAN         	2L /* Scan Event */
-#define PDC_PAT_EVENT_HANDLE       	3L /* Handle Event */
-#define PDC_PAT_EVENT_GET_NB_CALL  	4L /* Get Non-Blocking call Args */
+/*  PDC PAT EVENT */
+#define PDC_PAT_EVENT		68L	/* Interface to Platform Events */
+#define PDC_PAT_EVENT_GET_CAPS		0L /* Get Capabilities		*/
+#define PDC_PAT_EVENT_SET_MODE		1L /* Set Notification Mode	*/
+#define PDC_PAT_EVENT_SCAN		2L /* Scan Event		*/
+#define PDC_PAT_EVENT_HANDLE		3L /* Handle Event		*/
+#define PDC_PAT_EVENT_GET_NB_CALL	4L /* Get Non-Blocking call Args*/
 
 /*  PDC PAT HPMC */
-
-#define PDC_PAT_HPMC               70L /* Cause processor to go into spin
-				       ** loop, and wait for wake up from
-				       ** Monarch Processor */
-#define PDC_PAT_HPMC_RENDEZ_CPU     0L /* go into spin loop */
-#define PDC_PAT_HPMC_SET_PARAMS     1L /* Allows OS to specify intr which PDC 
+#define PDC_PAT_HPMC		70L	/* Cause processor to go into spin
+					 ** loop, and wait for wake up from
+					 ** Monarch Processor		*/
+#define PDC_PAT_HPMC_RENDEZ_CPU		0L /* go into spin loop		*/
+#define PDC_PAT_HPMC_SET_PARAMS		1L /* Allows OS to specify intr which PDC 
                                         * will use to interrupt OS during machine
-                                        * check rendezvous */
+                                        * check rendezvous		*/
 
-/* parameters for PDC_PAT_HPMC_SET_PARAMS: */
-#define HPMC_SET_PARAMS_INTR 	    1L /* Rendezvous Interrupt */
-#define HPMC_SET_PARAMS_WAKE 	    2L /* Wake up processor */
+/* parameters for PDC_PAT_HPMC_SET_PARAMS */
+#define HPMC_SET_PARAMS_INTR		1L /* Rendezvous Interrupt	*/
+#define HPMC_SET_PARAMS_WAKE		2L /* Wake up processor		*/
 
 /*  PDC PAT IO */
-
-#define PDC_PAT_IO                  71L /* On-line services for I/O modules */
-#define PDC_PAT_IO_GET_SLOT_STATUS   	5L /* Get Slot Status Info*/
+#define PDC_PAT_IO		71L	/* On-line services for I/O modules */
+#define PDC_PAT_IO_GET_SLOT_STATUS	 5L /* Get Slot Status Info	*/
 #define PDC_PAT_IO_GET_LOC_FROM_HARDWARE 6L /* Get Physical Location from */
-                                            /* Hardware Path */
+                                            /* Hardware Path		*/
 #define PDC_PAT_IO_GET_HARDWARE_FROM_LOC 7L /* Get Hardware Path from 
-                                             * Physical Location */
+                                             * Physical Location	*/
 #define PDC_PAT_IO_GET_PCI_CONFIG_FROM_HW 11L /* Get PCI Configuration
                                                * Address from Hardware Path */
 #define PDC_PAT_IO_GET_HW_FROM_PCI_CONFIG 12L /* Get Hardware Path 
                                                * from PCI Configuration Address */
-#define PDC_PAT_IO_READ_HOST_BRIDGE_INFO 13L  /* Read Host Bridge State Info */
+#define PDC_PAT_IO_READ_HOST_BRIDGE_INFO  13L /* Read Host Bridge State Info */
 #define PDC_PAT_IO_CLEAR_HOST_BRIDGE_INFO 14L /* Clear Host Bridge State Info*/
 #define PDC_PAT_IO_GET_PCI_ROUTING_TABLE_SIZE 15L /* Get PCI INT Routing Table 
-                                                   * Size */
+                                                   * Size		*/
 #define PDC_PAT_IO_GET_PCI_ROUTING_TABLE  16L /* Get PCI INT Routing Table */
-#define PDC_PAT_IO_GET_HINT_TABLE_SIZE 	17L /* Get Hint Table Size */
-#define PDC_PAT_IO_GET_HINT_TABLE   	18L /* Get Hint Table */
-#define PDC_PAT_IO_PCI_CONFIG_READ  	19L /* PCI Config Read */
-#define PDC_PAT_IO_PCI_CONFIG_WRITE 	20L /* PCI Config Write */
-#define PDC_PAT_IO_GET_NUM_IO_SLOTS 	21L /* Get Number of I/O Bay Slots in 
-                                       		  * Cabinet */
-#define PDC_PAT_IO_GET_LOC_IO_SLOTS 	22L /* Get Physical Location of I/O */
-                                   		     /* Bay Slots in Cabinet */
-#define PDC_PAT_IO_BAY_STATUS_INFO  	28L /* Get I/O Bay Slot Status Info */
-#define PDC_PAT_IO_GET_PROC_VIEW        29L /* Get Processor view of IO address */
-#define PDC_PAT_IO_PROG_SBA_DIR_RANGE   30L /* Program directed range */
+#define PDC_PAT_IO_GET_HINT_TABLE_SIZE    17L /* Get Hint Table Size	*/
+#define PDC_PAT_IO_GET_HINT_TABLE	18L /* Get Hint Table		*/
+#define PDC_PAT_IO_PCI_CONFIG_READ	19L /* PCI Config Read		*/
+#define PDC_PAT_IO_PCI_CONFIG_WRITE	20L /* PCI Config Write		*/
+#define PDC_PAT_IO_GET_NUM_IO_SLOTS	21L /* Get Number of I/O Bay Slots in 
+                                       		  * Cabinet		*/
+#define PDC_PAT_IO_GET_LOC_IO_SLOTS	22L /* Get Physical Location of I/O */
+                                   	    /* Bay Slots in Cabinet	*/
+#define PDC_PAT_IO_BAY_STATUS_INFO	28L /* Get I/O Bay Slot Status Info */
+#define PDC_PAT_IO_GET_PROC_VIEW	29L /* Get Processor view of IO address */
+#define PDC_PAT_IO_PROG_SBA_DIR_RANGE	30L /* Program directed range	*/
 
 /* PDC PAT MEM */
-
-#define PDC_PAT_MEM             	72L /* Manage memory page deallocation */
-#define PDC_PAT_MEM_PD_INFO     	0L /* Return PDT info for PD       */
-#define PDC_PAT_MEM_PD_CLEAR    	1L /* Clear PDT for PD             */
-#define PDC_PAT_MEM_PD_READ     	2L /* Read PDT entries for PD      */
-#define PDC_PAT_MEM_PD_RESET    	3L /* Reset clear bit for PD       */
-#define PDC_PAT_MEM_CELL_INFO   	5L /* Return PDT info For Cell     */
-#define PDC_PAT_MEM_CELL_CLEAR  	6L /* Clear PDT For Cell           */
-#define PDC_PAT_MEM_CELL_READ   	7L /* Read PDT entries For Cell    */
-#define PDC_PAT_MEM_CELL_RESET  	8L /* Reset clear bit For Cell     */
-#define PDC_PAT_MEM_SETGM	  	9L /* Set Golden Memory value      */
-#define PDC_PAT_MEM_ADD_PAGE    	10L /* ADDs a page to the cell      */
-#define PDC_PAT_MEM_ADDRESS     	11L /* Get Physical Location From   */
-                                    		 /* Memory Address               */
-#define PDC_PAT_MEM_GET_TXT_SIZE   	12L /* Get Formatted Text Size   */
-#define PDC_PAT_MEM_GET_PD_TXT     	13L /* Get PD Formatted Text     */
-#define PDC_PAT_MEM_GET_CELL_TXT   	14L /* Get Cell Formatted Text   */
+#define PDC_PAT_MEM		72L  /* Manage memory page deallocation */
+#define PDC_PAT_MEM_PD_INFO     	0L /* Return PDT info for PD	*/
+#define PDC_PAT_MEM_PD_CLEAR    	1L /* Clear PDT for PD		*/
+#define PDC_PAT_MEM_PD_READ     	2L /* Read PDT entries for PD	*/
+#define PDC_PAT_MEM_PD_RESET    	3L /* Reset clear bit for PD	*/
+#define PDC_PAT_MEM_CELL_INFO   	5L /* Return PDT info For Cell	*/
+#define PDC_PAT_MEM_CELL_CLEAR  	6L /* Clear PDT For Cell	*/
+#define PDC_PAT_MEM_CELL_READ   	7L /* Read PDT entries For Cell	*/
+#define PDC_PAT_MEM_CELL_RESET  	8L /* Reset clear bit For Cell	*/
+#define PDC_PAT_MEM_SETGM	  	9L /* Set Golden Memory value	*/
+#define PDC_PAT_MEM_ADD_PAGE    	10L /* ADDs a page to the cell	*/
+#define PDC_PAT_MEM_ADDRESS     	11L /* Get Physical Location From*/
+					    /* Memory Address		*/
+#define PDC_PAT_MEM_GET_TXT_SIZE   	12L /* Get Formatted Text Size	*/
+#define PDC_PAT_MEM_GET_PD_TXT     	13L /* Get PD Formatted Text	*/
+#define PDC_PAT_MEM_GET_CELL_TXT   	14L /* Get Cell Formatted Text	*/
 #define PDC_PAT_MEM_RD_STATE_INFO  	15L /* Read Mem Module State Info*/
 #define PDC_PAT_MEM_CLR_STATE_INFO 	16L /*Clear Mem Module State Info*/
 #define PDC_PAT_MEM_CLEAN_RANGE    	128L /*Clean Mem in specific range*/
-#define PDC_PAT_MEM_GET_TBL_SIZE   	131L /* Get Memory Table Size     */
-#define PDC_PAT_MEM_GET_TBL        	132L /* Get Memory Table          */
+#define PDC_PAT_MEM_GET_TBL_SIZE   	131L /* Get Memory Table Size	*/
+#define PDC_PAT_MEM_GET_TBL        	132L /* Get Memory Table	*/
 
 /* PDC PAT NVOLATILE */
+#define PDC_PAT_NVOLATILE	73L	   /* Access Non-Volatile Memory*/
+#define PDC_PAT_NVOLATILE_READ		0L /* Read Non-Volatile Memory	*/
+#define PDC_PAT_NVOLATILE_WRITE		1L /* Write Non-Volatile Memory	*/
+#define PDC_PAT_NVOLATILE_GET_SIZE	2L /* Return size of NVM	*/
+#define PDC_PAT_NVOLATILE_VERIFY	3L /* Verify contents of NVM	*/
+#define PDC_PAT_NVOLATILE_INIT		4L /* Initialize NVM		*/
 
-#define PDC_PAT_NVOLATILE          	73L /* Access Non-Volatile Memory */
-#define PDC_PAT_NVOLATILE_READ      	0L /* Read Non-Volatile Memory   */
-#define PDC_PAT_NVOLATILE_WRITE     	1L /* Write Non-Volatile Memory  */
-#define PDC_PAT_NVOLATILE_GET_SIZE  	2L /* Return size of NVM         */
-#define PDC_PAT_NVOLATILE_VERIFY    	3L /* Verify contents of NVM     */
-#define PDC_PAT_NVOLATILE_INIT      	4L /* Initialize NVM             */
-
 /* PDC PAT PD */
-
-#define PDC_PAT_PD                      74L /* Protection Domain Info      */
-#define PDC_PAT_PD_GET_ADDR_MAP         0L  /* Get Address Map             */
+#define PDC_PAT_PD		74L	    /* Protection Domain Info	*/
+#define PDC_PAT_PD_GET_ADDR_MAP		0L  /* Get Address Map		*/
 
 /* PDC_PAT_PD_GET_ADDR_MAP entry types */
-
-#define PAT_MEMORY_DESCRIPTOR           1
+#define PAT_MEMORY_DESCRIPTOR		1
 
 /* PDC_PAT_PD_GET_ADDR_MAP memory types */
+#define PAT_MEMTYPE_MEMORY		0
+#define PAT_MEMTYPE_FIRMWARE		4
 
-#define PAT_MEMTYPE_MEMORY              0
-#define PAT_MEMTYPE_FIRMWARE            4
-
 /* PDC_PAT_PD_GET_ADDR_MAP memory usage */
-
-#define PAT_MEMUSE_GENERAL              0
-#define PAT_MEMUSE_GI                 128
-#define PAT_MEMUSE_GNI                129
+#define PAT_MEMUSE_GENERAL		0
+#define PAT_MEMUSE_GI			128
+#define PAT_MEMUSE_GNI			129
 #endif /* __LP64__ */
 
 #ifndef __ASSEMBLY__
@@ -343,7 +342,6 @@
 extern int pdc_type;
 
 /* Values for pdc_type */
-
 #define PDC_TYPE_ILLEGAL	-1
 #define PDC_TYPE_PAT		 0 /* 64-bit PAT-PDC */
 #define PDC_TYPE_SYSTEM_MAP	 1 /* 32-bit, but supports PDC_SYSTEM_MAP */
@@ -816,6 +814,8 @@ int pdc_mem_mem_table(struct pdc_memory_
 
 int pdc_do_firm_test_reset(unsigned long ftc_bitmap);
 int pdc_do_reset(void);
+int pdc_soft_power_info(unsigned long *power_reg);
+void pdc_soft_power_shutdown(void);
 void pdc_iodc_putc(unsigned char c);
 
 int pdc_sti_call(unsigned long func, unsigned long flags,

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