[parisc-linux-cvs] shl definition broken

[Matthew Wilcox]

entry.S broke for 32-bit CONFIG_SMP because entry.S was using .level 2.0
for 32-bit processors and the shl macro was definied in terms of the PA
1.1 opcode.  So I fixed the macro definitions and changed to use shlw
on PA 2.0 narrow mode.

Index: include/asm-parisc/assembly.h
===================================================================
RCS file: /home/cvs/parisc/linux/include/asm-parisc/assembly.h,v
retrieving revision 1.17
diff -u -p -r1.17 assembly.h
--- assembly.h	2001/02/13 15:41:21	1.17
+++ assembly.h	2001/02/14 02:24:25
@@ -82,14 +82,15 @@
 	dep,z	\r, 31-\sa, 32-\sa, \t
 	.endm
 
-#ifdef __LP64__
-/* Alias for pa2.0 insn name. */
-#define	shlw	shl
+	/* The PA 2.0 shift left */
+	.macro shlw r, sa, t
+	depw,z	\r, 31-\sa, 32-\sa, \t
+	.endm
 
+	/* And the PA 2.0W shift left */
 	.macro shld r, sa, t
 	depd,z	\r, 63-\sa, 64-\sa, \t
 	.endm
-#endif
 
 	/* load 32-bit 'value' into 'reg' compensating for the ldil
 	 * sign-extension when running in wide mode.
Index: arch/parisc/kernel/entry.S
===================================================================
RCS file: /home/cvs/parisc/linux/arch/parisc/kernel/entry.S,v
retrieving revision 1.68
diff -u -p -r1.68 entry.S
--- entry.S	2001/02/13 15:41:16	1.68
+++ entry.S	2001/02/14 02:24:25
@@ -627,7 +627,7 @@ intr_return:
 #if __LP64__
 	shld	%r1, 6, %r20
 #else
-	shl	%r1, 5, %r20
+	shlw	%r1, 5, %r20
 #endif
 	add     %r19,%r20,%r19	/* now have &irq_stat[smp_processor_id()] */
 #endif /* CONFIG_SMP */
@@ -2005,7 +2005,7 @@ syscall_check_bh:
 #if __LP64__
 	shld	%r26, 6, %r20
 #else
-	shl	%r26, 5, %r20
+	shlw	%r26, 5, %r20
 #endif
 	add     %r19,%r20,%r19	/* now have &irq_stat[smp_processor_id()] */
 #endif /* CONFIG_SMP */